IEC 63011-1-ed.1.0

Annotation of standard text IEC 63011-1-ed.1.0 :

IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided. LIEC 63011-1:2018 donne des definitions relatives aux circuits integres multipuces constitues de puces empilees verticalement a laide de trous de liaison a travers le silicium ou de microbosses. Des termes et definitions relatifs a la fabrication et aux essais des circuits integres multipuces sont egalement fournis.